Detail
Specifications
Input | ||
Input Channel | 32 data sampling channels, 2 external clock channels | |
Threshold Voltage | 6 independent and adjustable threshold voltages | |
Adjustable Range: -6V ~ +6V | ||
Resolution: 0.1V | ||
Input Impedance | R ^ >100 kΩ, C ^ <8 pf | |
Sample/Memory | ||
Sampling Rate | Timing Rate | 1Hz ~ 100MHz (Period 10ns ~ 1s), Resolution: 10ns |
State Rate | 1Hz ~ 35MHz | |
Sampling Phase | rise edge, fall edge | |
Memory Depth | 256k bytes / channel | |
Trigger | ||
Trigger Condition | 32 bits trigger level, 32 bits trigger comparand | |
Event Count | 1 ~ 999 | |
Memory Delay | 1~ 260000 sampling cycles | |
Pattern Generator | ||
Pattern Type | CH00 to CH15 are counters with adding 1, CH16 to CH29 are shift pulse CH30 to CH31 monitor external clk1 and clk2 |
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Pattern Rate | Frequency: 1Hz ~ 50MHz(period 20ns ~ 1s) resolution:10ns | |
General Characteristics | ||
Power | AC220V(1±10%), 50Hz(1±5%), ≤10VA | |
Display | 5.7′ TFT LCD | |
Dimension & Weight | 329×283×155mm, Approx. 4.3kg |